Bump LLVM

build_tools/llvm_version.txt

@@ -1 +1 @@
-937e353fb22173c5976af9ae03352f16f9c8df2a
+dc61a534a58ddf2d7e2b5ebd6d4d60fa514254a7

include/TPP/Dialect/Xsmm/XsmmOps.td

@@ -105,7 +105,7 @@ def Xsmm_GemmOp : Xsmm_Op<"gemm", [MemoryEffects<[MemWrite, MemRead]>]> {
 
   let assemblyFormat = [{
     `(` `data_type` `=` $data_type `,` $inputs `)`
-    attr-dict `:` functional-type($inputs, results)
+    (`out_type` `=` $out_type^)? attr-dict `:` functional-type($inputs, results)
   }];
 
   let extraClassDeclaration = [{
@@ -135,7 +135,7 @@ def Xsmm_BrgemmOp : Xsmm_Op<"brgemm", [MemoryEffects<[MemWrite, MemRead]>]> {
 
   let assemblyFormat = [{
     `(` `data_type` `=` $data_type `,` $inputs `)`
-    attr-dict `:` functional-type($inputs, results)
+    (`out_type` `=` $out_type^)? attr-dict `:` functional-type($inputs, results)
   }];
 
   let extraClassDeclaration = [{

lib/TPP/Dialect/Xsmm/XsmmOps.cpp

@@ -16,8 +16,22 @@
 
 using namespace mlir;
 
+// The TableGen-generated op classes emit backward-compatibility builder shims
+// whose definitions call the now-deprecated `build`/`create` overloads
+// (superseded upstream by the Properties-based overloads). GCC reports these
+// self-referential calls under -Werror=deprecated-declarations even though they
+// occur within other deprecated functions. Suppress the diagnostic for the
+// generated code only; the guard follows the LLVM convention used in
+// mlir/include/mlir/Bindings/Python/Nanobind.h.
+#if defined(__clang__) || defined(__GNUC__)
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wdeprecated-declarations"
+#endif
 #define GET_OP_CLASSES
 #include "TPP/Dialect/Xsmm/XsmmOps.cpp.inc"
+#if defined(__clang__) || defined(__GNUC__)
+#pragma GCC diagnostic pop
+#endif
 
 using namespace mlir::xsmm;
 

lib/TPP/Transforms/ConvertLinalgGenericTo32BitAccumulation.cpp

@@ -151,8 +151,10 @@ struct ConvertLinalgGenericTo32BitOp : OpRewritePattern<linalg::GenericOp> {
           Value sum;
           if (isFloatType) {
             // cast inputs
-            auto a32 = arith::ExtFOp::create(b, loc, opType, a);
-            auto b32 = arith::ExtFOp::create(b, loc, opType, bval);
+            auto a32 = arith::ExtFOp::create(b, loc, opType, a,
+                                             arith::FastMathFlagsAttr{});
+            auto b32 = arith::ExtFOp::create(b, loc, opType, bval,
+                                             arith::FastMathFlagsAttr{});
 
             // mul + add
             auto mul = arith::MulFOp::create(b, loc, a32, b32);
@@ -197,7 +199,8 @@ struct ConvertLinalgGenericTo32BitOp : OpRewritePattern<linalg::GenericOp> {
           Value cast;
           if (isFloatType) {
             auto accActualF32 =
-                arith::ExtFOp::create(b, loc, opType, accActual);
+                arith::ExtFOp::create(b, loc, opType, accActual,
+                                      arith::FastMathFlagsAttr{});
 
             auto sum = arith::AddFOp::create(b, loc, acc, accActualF32);
 

lib/TPP/Transforms/ConvertLinalgToInplace.cpp

@@ -64,7 +64,8 @@ struct ConvertAddInplace : public OpRewritePattern<linalg::GenericOp> {
     rewriter.replaceOpWithNewOp<linalg::GenericOp>(
         op, op.getResultTypes(), inputs, outputs, indexingMaps, iteratorTypes,
         [&](OpBuilder &builder, Location loc, ValueRange regionArgs) {
-          auto scalarOp = arith::AddFOp::create(builder, loc, regionArgs);
+          auto scalarOp =
+              arith::AddFOp::create(builder, loc, regionArgs[0], regionArgs[1]);
           linalg::YieldOp::create(builder, loc, scalarOp.getResult());
         });
     return success();

lib/TPP/Transforms/FoldAddIntoDest.cpp

@@ -28,16 +28,24 @@ namespace {
 /// Replace a linalg.add with one operand the single user of a contraction,
 /// which has a zero-filled, "identity-mapped" destination and is dominated by
 /// the `other` operand, by the contraction with `other` as its dest.
-struct FoldAddIntoDestRewrite : public OpRewritePattern<linalg::AddOp> {
-  using OpRewritePattern<linalg::AddOp>::OpRewritePattern;
+struct FoldAddIntoDestRewrite : public OpRewritePattern<linalg::ElementwiseOp> {
+  using OpRewritePattern<linalg::ElementwiseOp>::OpRewritePattern;
 
-  LogicalResult matchAndRewrite(linalg::AddOp addOp,
+  LogicalResult matchAndRewrite(linalg::ElementwiseOp addOp,
                                 PatternRewriter &rewriter) const override {
+    // Pattern only applies on a binary elementwise add.
+    if (addOp.getKind() != linalg::ElementwiseKind::add)
+      return failure();
+
+    // For now, pattern only applies on tensor types (memref support is TODO).
+    if (!addOp.hasPureTensorSemantics())
+      return failure();
+
     Value dominatingOperand = nullptr;
     linalg::LinalgOp dominatedOp = nullptr;
     {
-      auto firstOperand = addOp.getOperand(0);
-      auto secondOperand = addOp.getOperand(1);
+      auto firstOperand = addOp.getInputs()[0];
+      auto secondOperand = addOp.getInputs()[1];
 
       // Can only put one of addOp's operands in the dest/out arg of the other's
       // defining op based on suitable dominance.

lib/TPP/Transforms/FoldIntoEltwise.cpp

@@ -120,11 +120,14 @@ struct BroadcastIntoEltwise
 // TODO: Linalg eltwise fusion pass could be generalized to operate on LinalgOp
 //       instead of GenericOp.
 // TODO: Extend linalg scalar inlining pass.
-struct FillIntoMax : public OpRewritePattern<linalg::MaxOp> {
-  using OpRewritePattern<linalg::MaxOp>::OpRewritePattern;
+struct FillIntoMax : public OpRewritePattern<linalg::ElementwiseOp> {
+  using OpRewritePattern<linalg::ElementwiseOp>::OpRewritePattern;
 
-  LogicalResult matchAndRewrite(linalg::MaxOp maxOp,
+  LogicalResult matchAndRewrite(linalg::ElementwiseOp maxOp,
                                 PatternRewriter &rewriter) const override {
+    if (maxOp.getKind() != linalg::ElementwiseKind::max_signed)
+      return rewriter.notifyMatchFailure(maxOp, "expects max_signed kind");
+
     if (!maxOp.hasPureTensorSemantics())
       return rewriter.notifyMatchFailure(maxOp, "expects tensor semantics");
 
@@ -177,9 +180,11 @@ struct FillIntoMax : public OpRewritePattern<linalg::MaxOp> {
           operands.append(constants);
           Value max;
           if (isa<FloatType>(getElementTypeOrSelf(resultTypes[0])))
-            max = arith::MaximumFOp::create(nestedBuilder, nestedLoc, operands);
+            max = arith::MaximumFOp::create(nestedBuilder, nestedLoc,
+                                            operands[0], operands[1]);
           else
-            max = arith::MaxSIOp::create(nestedBuilder, nestedLoc, operands);
+            max = arith::MaxSIOp::create(nestedBuilder, nestedLoc, operands[0],
+                                         operands[1]);
           linalg::YieldOp::create(nestedBuilder, nestedLoc, ValueRange{max});
         });
     rewriter.replaceOp(maxOp, genericOp->getResults());

lib/TPP/Transforms/LinalgConvertCompareSelectToMaximumfPass.cpp

@@ -51,10 +51,8 @@ struct LinalgConvertCompareSelectToMaximumf
         select.getOperand(1) != cmpf.getOperand(0))
       return failure();
     rewriter.setInsertionPointAfter(&op.getBody()->front());
-    auto maxf = arith::MaximumFOp::create(rewriter, 
-        op.getLoc(),
-        dyn_cast<arith::CmpFOp>(op.getBody()->getOperations().begin())
-            ->getOperands());
+    auto maxf = arith::MaximumFOp::create(rewriter, op.getLoc(),
+                                          cmpf.getOperand(0), cmpf.getOperand(1));
     dyn_cast<YieldOp>(op.getBody()->getTerminator()).setOperand(0, maxf);
 
     // Deletion in reverse order due to dependences

test/Conversion/LinalgToXsmm/linalg-to-brgemm.mlir

@@ -285,10 +285,7 @@ func.func @simple_brgemm(%arg0: memref<2x32x32xf32>, %arg1: memref<2x32x32xf32>,
 #map = affine_map<(d0, d1, d2, d3, d4) -> (d0, d2, d4, d1)>
 #map1 = affine_map<(d0, d1, d2, d3, d4) -> (d0, d4, d3, d1)>
 #map2 = affine_map<(d0, d1, d2, d3, d4) -> (d2, d3)>
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @vnni_brgemm_interchanged(%arg0: memref<16x32x32xbf16>, %arg1: memref<16x16x32x2xbf16>, %arg2: memref<32x32xbf16>) {
     %expanded = memref.expand_shape %arg0 [[0], [1], [2, 3]] output_shape [16, 32, 16, 2]
       : memref<16x32x32xbf16> into memref<16x32x16x2xbf16>
@@ -320,10 +317,7 @@ module attributes {
 #map1 = affine_map<(d0, d1, d2, d3, d4) -> (d0, d3, d2, d4)>
 #map2 = affine_map<(d0, d1, d2, d3, d4) -> (d1, d2)>
 
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @vnni_brgemm(%arg0: memref<16x32x32xbf16>, %arg1: memref<16x16x32x2xbf16>, %arg2: memref<32x32xbf16>) {
     %expanded = memref.expand_shape %arg0 [[0], [1], [2, 3]] output_shape [16, 32, 16, 2]
       : memref<16x32x32xbf16> into memref<16x32x16x2xbf16>
@@ -357,10 +351,7 @@ module attributes {
 // Mixed-precision: bf16 inputs are extended to f32 and accumulated into an f32
 // output. The kernel input `data_type` stays bf16 while the wider output type
 // is carried via `out_type` (f32 = 1).
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @vnni_brgemm_f32_acc(%arg0: memref<16x32x16x2xbf16>, %arg1: memref<16x16x32x2xbf16>, %arg2: memref<32x32xf32>) {
     linalg.generic {
       indexing_maps = [#map, #map1, #map2],
@@ -385,18 +376,15 @@ module attributes {
 // CHECK: %[[COLLAPSE:.+]] = memref.collapse_shape %[[ARG0]]
 // CHECK: %[[DIS:.+]] = xsmm.brgemm.dispatch [32, 32, 32, 32, 32, 32, 1024, 1024]
 // CHECK-SAME:  flags = (vnni_b) data_type = bf16 {out_type = 1 : i64}
-// CHECK: xsmm.brgemm(data_type = bf16, %[[DIS]], %[[COLLAPSE]], %[[ARG1]], %[[ARG2]], %[[C16]]) {out_type = 1 : i64}
+// CHECK: xsmm.brgemm(data_type = bf16, %[[DIS]], %[[COLLAPSE]], %[[ARG1]], %[[ARG2]], %[[C16]]) out_type = f32
 
 // -----
 
 #map = affine_map<(d0, d1, d2, d3, d4) -> (d0, d1, d3, d4)>
 #map1 = affine_map<(d0, d1, d2, d3, d4) -> (d0, d3, d2, d4)>
 #map2 = affine_map<(d0, d1, d2, d3, d4) -> (d1, d2)>
 
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @vnni_brgemm_strided(%arg0: memref<8x8x8xbf16, strided<[64, 8, 1], offset: ?>>,
                                 %arg1: memref<8x4x8x2xbf16, strided<[64, 16, 2, 1], offset: ?>>,
                                 %arg2: memref<8x8xbf16>) {
@@ -431,10 +419,7 @@ module attributes {
 #map1 = affine_map<(d0, d1, d2, d3, d4) -> (d0, d4, d3, d1)>
 #map2 = affine_map<(d0, d1, d2, d3, d4) -> (d3, d2)>
 
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @vnni_brgemm_require_transpose_on_C(%arg0: memref<16x32x32xbf16>, %arg1: memref<16x16x32x2xbf16>, %arg2: memref<32x32xbf16>) {
     %expanded = memref.expand_shape %arg0 [[0], [1], [2, 3]] output_shape [16, 32, 16, 2]
       : memref<16x32x32xbf16> into memref<16x32x16x2xbf16>

test/Conversion/LinalgToXsmm/linalg-to-gemm-fp8.mlir

@@ -8,10 +8,7 @@
 #map2 = affine_map<(d0, d1, d2, d3) -> (d1, d2)>
 // Fix VNNI blocking factor for lit testing.
 // Prevent mismatches due to target specific VNNI factors.
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 4 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 4 : i32>>}> {
   func.func @square_vnni_gemm_e5m2(%arg0: memref<64x16x4xf8E5M2, strided<[64, 4, 1], offset: ?>>,
     %arg1: memref<16x64x4xf8E5M2>, %arg2: memref<64x64xf8E5M2, strided<[64, 1], offset: ?>>) {
     linalg.generic {
@@ -37,10 +34,7 @@ module attributes {
 #map = affine_map<(d0, d1, d2, d3) -> (d1, d3, d0)>
 #map1 = affine_map<(d0, d1, d2, d3) -> (d3, d2, d0)>
 #map2 = affine_map<(d0, d1, d2, d3) -> (d1, d2)>
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 4 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 4 : i32>>}> {
   func.func @square_vnni_gemm_e4m3(%arg0: memref<64x16x4xf8E4M3FN, strided<[64, 4, 1], offset: ?>>,
     %arg1: memref<16x64x4xf8E4M3FN>, %arg2: memref<64x64xf8E4M3FN, strided<[64, 1], offset: ?>>) {
     linalg.generic {

test/Conversion/LinalgToXsmm/linalg-to-gemm.mlir

@@ -151,10 +151,7 @@ func.func @mha_projection(%arg0: memref<512x8x64xf32>, %arg1: memref<64x32x512xf
 #map2 = affine_map<(d0, d1, d2, d3) -> (d1, d2)>
 // Fix VNNI blocking factor for lit testing.
 // Prevent mismatches due to target specific VNNI factors.
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @square_vnni_gemm(%arg0: memref<64x64xbf16, strided<[64, 1], offset: ?>>,
     %arg1: memref<32x64x2xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     %expanded = memref.expand_shape %arg0 [[0], [1, 2]] output_shape [64, 32, 2]
@@ -188,10 +185,7 @@ module attributes {
 // Mixed-precision: bf16 inputs are extended to f32 and accumulated into an f32
 // output. The kernel input `data_type` stays bf16 while the wider output type
 // is carried via `out_type` (f32 = 1).
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @square_vnni_gemm_f32_acc(%arg0: memref<64x32x2xbf16, strided<[64, 2, 1], offset: ?>>,
     %arg1: memref<32x64x2xbf16>, %arg2: memref<64x64xf32, strided<[64, 1], offset: ?>>) {
     linalg.generic {
@@ -216,17 +210,14 @@ module attributes {
 // CHECK-SAME:  %[[ARG2:.+]]: memref<64x64xf32, strided<[64, 1], offset: ?>>
 // CHECK: %[[COLLAPSE:.+]] = memref.collapse_shape %[[ARG0]] {{\[}}[0], [1, 2]]
 // CHECK: %[[DIS:.+]] = xsmm.gemm.dispatch [64, 64, 64, 64, 64, 64] flags = (vnni_b) data_type = bf16 {out_type = 1 : i64}
-// CHECK: xsmm.gemm(data_type = bf16, %[[DIS]], %[[COLLAPSE]], %[[ARG1]], %[[ARG2]]) {out_type = 1 : i64}
+// CHECK: xsmm.gemm(data_type = bf16, %[[DIS]], %[[COLLAPSE]], %[[ARG1]], %[[ARG2]]) out_type = f32
 
 // -----
 
 #map = affine_map<(d0, d1, d2, d3) -> (d1, d3, d0)>
 #map1 = affine_map<(d0, d1, d2, d3) -> (d3, d2, d0)>
 #map2 = affine_map<(d0, d1, d2, d3) -> (d1, d2)>
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @expanded_arg_vnni_gemm(%arg0: memref<64x32x2xbf16, strided<[64, 2, 1], offset: ?>>,
     %arg1: memref<32x64x2xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     linalg.generic {
@@ -259,10 +250,7 @@ module attributes {
 #map2 = affine_map<(d0, d1, d2, d3) -> (d2, d1)>
 
 // Require a transpose on C, before mapping to vnni Gemm.
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @expect_not_to_match_vnni_gemm(%arg0: memref<64x64xbf16, strided<[64, 1], offset: ?>>,
     %arg1: memref<32x64x2xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     %expanded = memref.expand_shape %arg0 [[0], [1, 2]] output_shape [64, 32, 2]
@@ -292,10 +280,7 @@ module attributes {
 #map2 = affine_map<(d0, d1, d2, d3) -> (d1, d2)>
 
 // Not VNNI layout. A factor of 5 is not VNNI.
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @expect_not_to_match_vnni_gemm(%arg0: memref<64x160xbf16, strided<[160, 1], offset: ?>>,
     %arg1: memref<32x64x5xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     %expanded = memref.expand_shape %arg0 [[0], [1, 2]] output_shape [64, 32, 5]
@@ -325,10 +310,7 @@ module attributes {
 #map2 = affine_map<(d0, d1, d2, d3) -> (d2, d1)>
 
 // Require a transpose on A, before mapping to vnni Gemm.
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @expect_not_to_match_vnni_gemm(%arg0: memref<32x64x2xbf16, strided<[128, 2, 1], offset: ?>>,
     %arg1: memref<32x64x2xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     linalg.generic {
@@ -357,10 +339,7 @@ module attributes {
 
 // Make sure we can handle interchange on the iterators, but with the right
 // access patterns.
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @vnni_gemm_interchanged(%arg0: memref<64x64xbf16, strided<[64, 1], offset: ?>>,
     %arg1: memref<32x64x2xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     %expanded = memref.expand_shape %arg0 [[0], [1, 2]] output_shape [64, 32, 2]
@@ -393,10 +372,7 @@ module attributes {
 #map2 = affine_map<(d0, d1, d2, d3) -> (d2, d1)>
 
 // Not VNNI layout. The VNNI is not innermost in the access pattern for B.
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @expect_not_to_match_vnni_gemm(%arg0: memref<64x64xbf16, strided<[64, 1], offset: ?>>,
     %arg1: memref<2x64x32xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     %expanded = memref.expand_shape %arg0 [[0], [1, 2]] output_shape [64, 32, 2]
@@ -426,10 +402,7 @@ module attributes {
 #map1 = affine_map<(d0, d1, d2, d3) -> (d3, d2, d0)>
 #map2 = affine_map<(d0, d1, d2, d3) -> (d1, d2)>
 
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @non_square_vnni_gemm(%arg0: memref<64x16xbf16, strided<[64, 1], offset: ?>>,
     %arg1: memref<8x64x2xbf16>, %arg2: memref<64x64xbf16, strided<[64, 1], offset: ?>>) {
     %expanded = memref.expand_shape %arg0 [[0], [1, 2]] output_shape [64, 8, 2]
@@ -461,10 +434,7 @@ module attributes {
 #map1 = affine_map<(d0, d1, d2, d3) -> (d3, d2, d0)>
 #map2 = affine_map<(d0, d1, d2, d3) -> (d1, d2)>
 
-module attributes {
-  "#dlti.sys_spec" = #dlti.target_system_spec<"CPU"
-    = #dlti.target_device_spec<"vnni" = 2 : i32>>
-} {
+module <{dlti = #dlti.target_system_spec<"CPU" = #dlti.target_device_spec<"vnni" = 2 : i32>>}> {
   func.func @non_square_vnni_gemm_1(%arg0: memref<4x16xbf16, strided<[64, 1], offset: ?>>,
     %arg1: memref<8x64x2xbf16>, %arg2: memref<4x64xbf16, strided<[64, 1], offset: ?>>) {
     %expanded = memref.expand_shape %arg0 [[0], [1, 2]] output_shape [4, 8, 2]